1. Field of the Invention
The present invention relates to a semiconductor device, and more particularly to a thin film transistor and a fabrication method therefor applying a self-aligned process.
2. Description of the Conventional Art
In a conventional thin film transistor, when a gate electrode receives a voltage which is greater than a threshold voltage, and when a drain electrode receives a voltage greater than a source voltage, electrons, majority carriers in a source region, are migrated to a drain region via a channel region formed in a polysilicon layer, and thus a driving current is made to flow. However, when forming the channel region by applying the voltage to the gate electrode, the mobility of majority carriers is lowered due to a potential barrier formed by grain boundaries inside the polysilicon layer, and thus the driving current is reduced in a turn-on state.
Accordingly, there is provided an offset region of low resistance in the channel region at a side of the drain region in order to reduce the leakage current. A method of fabricating the conventional thin film transistor will now be described with reference to the appended drawings.
As shown in FIG. 1A, a polysilicon layer is deposited on an insulating substrate 1 by chemical vapor deposition (CVD), and patterned by a photo etching process, applying the polysilicon layer as a gate mask, for thus forming a gate electrode 2.
As shown in FIG. 1B, a gate insulation film 3 is formed by depositing an insulating material on the surface of the insulating substrate 1 including the gate electrode 2, and an active layer 4 is deposited thereon by CVD.
A photoresist is applied on the active layer 4 and patterned by a photo etching process, for thus forming a photoresist pattern 5 as shown in FIG. 1C. Here, the photoresist pattern 5 defines channel and offset regions of the active layer 4.
As shown in FIGS. 1C and 1D, impurity regions 6a and 6b are formed by performing ion implantation, applying P or N-type impurities, into parts of the active layer 4 which are externally exposed, for thereby completing the fabrication of the conventional thin film transistor.
The impurity regions 6a and 6b define a source (a) and a drain (d), respectively, of a MOS transistor. In FIG. 1D, a, b, c, and d indicate the source, channel region, offset region, and drain, respectively.
However, a photomask process of the conventional method, which defines the length of each of the channel and offset regions, varies an offset current, which is dependent upon the degree of alignment, on a large scale, thereby reducing the reliability and reproducibility of the semiconductor device.